PLC input / output lag time (PLC system response time) Introduction

Input / output lag time, also known as system response time, refers to the time interval between the time when the input signal of the PLC changes and the time when it controls the change of the external output signal. It is composed of input circuit filter time, output circuit lag Time and scan work for the lag time of the three parts.
The RC filter circuit of the input module is used to filter out the interference noise introduced by the input terminal and eliminate the adverse effect caused by the jitter generated when the external input contacts operate. The time constant of the filter circuit determines the length of the input filter time, and its typical value About 10ms.
The delay time of the output module is related to the type of the module. The lag time of the relay output circuit is generally about 10ms. The lag time of the bidirectional thyristor type output circuit when the load is powered on is about 1ms. The maximum lag time of the load from power-on to power-off For 10ms; Transistor output circuit lag time generally below 1ms.
The lag time caused by the scan mode can be up to two multi-scan cycles.
The total PLC response delay is typically only a few tens of ms, which is irrelevant to a typical system. Systems that require the lag time between input and output signals to be as short as possible can be selected using a PLC with fast scanning or other measures.